AMD/iommu: SR56x0 Erratum 64 - Reset all head & tail pointers
authorAndrew Cooper <andrew.cooper3@citrix.com>
Wed, 22 May 2013 13:26:52 +0000 (15:26 +0200)
committerJan Beulich <jbeulich@suse.com>
Wed, 22 May 2013 13:26:52 +0000 (15:26 +0200)
commit6d243308e1d75f866679db226159c797d6c83aad
tree579ce8edce0d691709dd315c7a06952ea1b50556
parentfbf7a46dae7f18a313f9317bbf9afc2249941a95
AMD/iommu: SR56x0 Erratum 64 - Reset all head & tail pointers

Reference at time of patch:
http://support.amd.com/us/ChipsetMotherboard_TechDocs/46303.pdf

Erratum 64 states that the head and tail pointers for the Command buffer and
Event log are only reset on a cold boot, not a warm boot.

While the erratum is limited to systems using SR56xx chipsets (such as Family
10h CPUs), resetting the pointers is a sensible action in all cases, including
the PPR log for consistency.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
Acked-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
xen/drivers/passthrough/amd/iommu_init.c